A Study on a Multi-Disciplinary Optimization Method for the PMP

In the mobile electronic appliances market, the feature of products is getting smaller, thinner and more multi- functional. Therefore, mobile products are easily damaged from drop/impact and thermal cycling load. To make them more reliable under these conditions, the junction area between chips and PCB should be designed to bear up under drop/impact. And the heat caused by main chip (Memory & DMB channel chip) should be dissipated as quickly as possible. From the viewpoint of CAE simulation, although those two problems (drop & heat) should be considered simultaneously, they should not. Because the outline of PCB mainly depends on the location of main chip, positioning the main chip is one of the most important steps in the initial design stage. And the dynamic stress from free drop and heat caused by main chip are the one of the most critical factors to position the main chip. This paper presents the design process for positioning the main chip on PCB of PMP using MDO method. That is, the trade-off design variables between drop and thermal loading analysis were identified and system level optimization is performed in parallel. The main theme of this paper is to provide a way to get MDO solution of the PMP model in the early design stage.